As IC geometries shrink, the large, consolidated memory blocks within ICs are giving way to tens or even hundreds of smaller memory arrays distributed throughout each chip. These arrays serve as ...

The variety of different test methodologies combined with today�s mixture of memory devices creates a complex test profile. The manufacturing test floor hums with activity; a range of memory devices ...

Memory test at-speed isn't easy but can be achieved by balancing test selection, area overhead, and test-time constraints. The semiconductor industry has intensified its focus on yield issues to meet ...

Having explained in part 1 the nature of the memory test challenge in the industry today, this article discusses non-intrusive debug and test methods based on embedded instruments and how these ...